nanog mailing list archives

Re: MX204 Virtual Chassis Setup


From: Aaron Gould <aaron1 () gvtc com>
Date: Wed, 23 Aug 2023 11:38:01 -0500

some of these port capabilities are weird to me.  like on the ACX7100-48L you can do 4x100 or 8x50, but ONLY one 40g ?!

me@7100> show chassis pic pic-slot 0 fpc-slot 0 | find 400
  48     0       1x400G 1x100G 1x40G 4x100G 2x100G 8x50G 2x50G 4x25G 4x10G 3x100G   49     0       1x400G 1x100G 1x40G 4x100G 2x100G 8x50G 2x50G 4x25G 4x10G 3x100G   50     0       1x400G 1x100G 1x40G 4x100G 2x100G 8x50G 2x50G 4x25G 4x10G 3x100G   51     0       1x400G 1x100G 1x40G 4x100G 2x100G 8x50G 2x50G 4x25G 4x10G 3x100G   52     0       1x400G 1x100G 1x40G 4x100G 2x100G 8x50G 2x50G 4x25G 4x10G 3x100G   53     0       1x400G 1x100G 1x40G 4x100G 2x100G 8x50G 2x50G 4x25G 4x10G 3x100G
  54     NA      1x10G




On 8/23/2023 11:29 AM, tim () pelican org wrote:
On Wednesday, 23 August, 2023 16:33, "Mark Tinka" <mark@tinka.africa> said:

[faceplate oversubscription]

On the new ACX line, yes.
Not Trio, and different PLM :)

We don't mess around with any other MX products, so not sure (although
we are still yet to deploy the MPC10E's and the MX304).
MX304 (well, strictly LMIC16) has the same restriction, and a need for another entry in the magic port checker 
(https://apps.juniper.net/home/port-checker/index.html) for restrictions beyond "SUM(port-speeds) <= 1.6T".

They make sense once you've looked at the block diagram for the thing and followed the lines, but things like "4x10G 
breakout can only go in odd-numbered ports, and you have to leave the corresponding next-lowest even-numbered port empty" are not 
instantly obvious.

Thanks,
Tim.


--
-Aaron


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