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Re: DPDK and energy efficiency


From: Etienne-Victor Depasquale <edepa () ieee org>
Date: Tue, 23 Feb 2021 23:44:26 +0100


This is way too deep in the weeds of developing with the DPDK
libraries for your audience here to have much in the way of useful
comment.  This is an operators group.


Fair enough, and thank you for stepping on the brakes :)

Honestly, I didn't intend to get embroiled in this. The questions were
bare-bones and relate to common use of DPDK.

Over and out. I'll post the results on Friday evening CET.

Cheers,

Etienne

On Tue, Feb 23, 2021 at 11:38 PM William Herrin <bill () herrin us> wrote:

On Tue, Feb 23, 2021 at 2:22 PM Etienne-Victor Depasquale
<edepa () ieee org> wrote:
DPDK doesn't inherently do much in the way of power management.

I agree - it doesn't. That's not what it was made for.

 Note that DPDK applications are usually intended to run in very-high

data rate environments where no gains are likely to be realized by
avoiding a busy-wait loop.

That's not what research shows.

Use of LPI states is proposed for power management under high data rate
conditions in [5] and
in [6], use of the low-power instruction halt  is investigated and found
to save power under such conditions.

Howdy,

This is way too deep in the weeds of developing with the DPDK
libraries for your audience here to have much in the way of useful
comment.  This is an operators group.

If anyone is interested, the techniques DPDK offers application
authors to manage power on the dataplane cores are described here:

https://doc.dpdk.org/guides/prog_guide/power_man.html

The main thing devs do, since it's easy, is add a call to rte_pause()
in any empty polling loop. IIRC, that just calls the CPU PAUSE
instruction which doesn't actually pause anything but saves a little
power by de-pipelining and, if hyperthreading is enabled, releasing
the core to run the alternate thread.

Regards,
Bill Herrin



--
William Herrin
bill () herrin us
https://bill.herrin.us/



-- 
Ing. Etienne-Victor Depasquale
Assistant Lecturer
Department of Communications & Computer Engineering
Faculty of Information & Communication Technology
University of Malta
Web. https://www.um.edu.mt/profile/etiennedepasquale

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