recommendations developed by an NSF sponsored panel on high performance memory systems

[David Farber <farber () central cis upenn edu>]

National Science Foundation
Arlington, VA 22230
Computer and Information Science and Engineering Directorate
Division of Microelectronic Information Processing Systems


May 16, 1994




Dear Colleague:


In response to the recommendations developed by an NSF sponsored panel on
high performance memory systems [1], and an Information Infrastructure
Technology and Applications (IITA) Task Force report [2], the
Microelectronic Systems Architecture (MSA) and the Experimental Systems
(ES) Programs are encouraging the submission of proposals dealing with
research topics in the area of high performance storage systems and wide
band I/O.


The panelists at the memory workshop identified the growing disparity
between processor and memory speeds as a critical issue in the design and
use of high performance computing systems. They stated that this "is likely
to be the dominant concern for computer architects, compiler writers,
algorithm designers, and users for at least the next decade." Similar
observations hold for all levels of the memory and I/O subsystems. The
rapidly increasing use of distributed computers, where parts of the memory
subsystem can be physically distant from the processors, will greatly
aggravate this mismatch between a processor's potential computation rate
and the rate at which it can access data.


The IITA Task Force focused on projected applications for the National
Information Infrastructure (NII), including many of those intended to
contribute to the solution of the National Grand Challenges of the High
Performance Computing and Communications initiative. These applications are
characterized by the need for access to large amounts of distributed data
at a very high rate. For example, the current NTSC video standard requires
45 Mbit/second bandwidth, while high definition TV will require 700
Mbit/second access. Current high capacity disk drives are limited to
bandwidths in the range of 10 Mbit/second. Given the video requirements in
many of the IITA applications, it seems clear that improvements in the
underlying systems architectures, especially the I/O and memory systems,
will be required in order to realize the potential of the NII.


As part of the IITA initiative, the MSA and ES programs are responding to
the issues raised by these two reports by soliciting high quality proposals
for projects dealing with all aspects of the high performance memory
systems and wide band I/O. They are especially interested in those projects
that address problems of accessing large data sets at a high rate over
networks. The program seeks projects that offer new and innovative
approaches, as opposed to incremental improvements in existing system
architectures. Topics of interest include, but are not limited to, the
following:


* The development of new memory systems that take advantage of the unique
features of new and emerging storage technologies, and that are optimized
for IITA applications and network architectures


* New techniques for organizing cache memories and other buffering schemes
to alleviate memory and network latency and increase bandwidth.


* Partitioning of systems and the distribution of computing tasks
throughout a distributed system to reduce the amount of data that must be
moved.


* Reliability and fault tolerance issues motivated by the I/O and memory
requirements of the IITA applications and underlying networks.


Please forward copies of this announcement to interested colleagues.
Interested researchers should contact the directors of the MSA and ES
programs listed below for further information and to express interest and
suggestions in response to this announcement.


        Michael J. Foster          J. Robert Jump
        Director, ES Program       Director, MSA Program
        mfoster () nsf gov            jjump () nsf gov
        (703) 306-1936             (703) 306-1936


All proposals must be prepared in accordance with the instructions
contained in the NSF Grant Proposal Guide (NSF 94-2).  Single copies of
this brochure are available at no cost from the NSF Forms and Publications
Unit, (703) 306-1130, or via Email (Bitnet: pubs@nsf or Internet:
pubs () nsf gov).  Brochures are also available through NSF's on-line Science
and Technology Information System (STIS).  To access the system, follow the
instructions on the STIS flyer (NSF 94-4). To get an electronic copy of the
flyer, send an E-Mail message to stisfly () nsf gov. (Internet) or stisfly@NSF
(BITNET).  Proposals should be submitted to the National Science Foundation
PPU, 4201 Wilson Boulevard, Room P60, Arlington, VA, 22230.


Ten copies of the proposal are required, one of which must be signed by the
Principal Investigator(s) and an official authorized to commit the
proposing institution. For information regarding electronic proposal
submission, contact the Electronic Proposal Submission Project Leader,
Division of Information Systems (DIS), via electronic mail to eps () nsf gov
(Internet) or eps@nsf (BITNET) or by telephone at (703) 306-1144 (X-4662).


Proposals in response to this letter will be subject to the NSF peer review
process which may include panel and/or mail review.   Criteria by which
proposals are judged can be found in the Grant Proposal Guide;  they
include the intrinsic merit of the research, the utility or relevance of
the research, the capability of the investigators, and the effect of the
research on the infrastructure of science and engineering.


The Foundation provides awards for research in the sciences and
engineering. The awardee is wholly responsible for the conduct of such
research and preparation of the results for publication. The Foundation,
therefore, does not assume responsibility for the research findings or
their interpretation.


The Foundation welcomes proposals from all qualified scientists and
engineers, and strongly encourages women, minorities, and persons with
disabilities to compete fully in any of the research and related programs
described here.


In accordance with federal statutes, regulations, and NSF policies, no
person on grounds of race, color, age, sex, national origin, or disability
shall be excluded from participation in, be denied the benefits of, or be
subject to discrimination under any program or activity receiving financial
assistance from the National Science Foundation.


Facilitation Awards for Scientists and Engineers with Disabilities (FASED)
provide funding for special assistance or equipment to enable persons with
disabilities (investigators and other staff, including student research
assistants) to work on NSF projects. See the program announcement or
contact the Program Coordinator at (703) 306-1636.


Privacy Act and Public Burden.  Information requested on NSF application
materials is solicited under the authority of the National Science
Foundation Act of 1950, as amended. It will be used in connection with the
selection of qualified proposals and may be used and disclosed to qualified
reviewers and staff assistants as part of the review process and to other
government agencies. See Systems of Records, NSF- 50, Principal
Investigator/Proposal File and Associated Records, and NSF- 51,
Reviewer/Proposals File and Associated Records, 56 Federal Register 54907
(Oct. 23, 1991). Submission of the information is voluntary. Failure to
provide full and complete information, however, may reduce the possibility
of your receiving an award.


The public reporting burden for this collection of information is estimated
to average 120 hours per response, including the time for reviewing
instructions. Send comments regarding this burden estimate or any other
aspect of this collection of information, including suggestions for
reducing this burden, to Herman G. Fleming, Reports Clearance Officer,
Division of Contracts, Policy, and Oversight, National Science Foundation,
4201 Wilson Boulevard, Arlington, VA 22230; and to the Office of Management
and Budget, Paperwork Reduction Project (3145-0058), Washington, D.C.
20503.


The National Science Foundation has TDD (Telephonic Device for the Deaf)
capability, which enables individuals with hearing impairment to
communicate with the Foundation about NSF programs, employment, or general
information. This number is (703) 306-0090.


The National Science Foundation programs described in this publication fall
under category 47.070 - Computer and Information Science and Engineering,
in the latest Catalog of Federal Domestic Assistance issued by the Office
of Management of Budget and the General Services Administration.




        Michael J. Foster       J. Robert Jump
        Director, ES Program    Director, MSA Program




References:


[1] NSF Workshop on High Performance Memory Systems Final Report, Report
No. TR-93-35, Computer Science Department, University of Virginia,
Charlottesville, VA, June 1993


[2] Report of the IITA Task Group of the High Performance Computing,
Communications and Information Technology Subcommittee, National
Coordination Office for HPCC, Office of Science and Technology, February
1994






OMB 3145-0058
KW 100400
PT 34                                           NSF 94-75








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* J. ROBERT JUMP                                  | email: jjump () nsf gov  *
* Microelectronic Systems Architecture Program    | --------------------- *
* Microelectronic Information Processing Division | phone: (703) 306-1936 *
* National Science Foundation, Room 1155          | --------------------- *
* 4201 Wilson Boulevard, Arlington, VA 22230      | fax:   (703) 306-0610 *
***************************************************************************






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