Cyrix 486 CPU Bug

[David Farber <farber () central cis upenn edu>]

Date: Fri, 29 Apr 94 07:40 EST
From: Dave Methvin <0003122224 () mcimail com>
Subject: Cyrix 486 CPU Bug


I'm an editor at Windows Magazine.  In our May issue I wrote a news
story reporting a bug in the Cyrix Cx486DX CPU.  The Cyrix Cx486DX was
designed to be completely software-compatible with Intel's i486DX
processor.  However, Ed Curry of Lone Star Evaluation Labs (LSEL) found
a bug relating to floating-point operations while doing some in-depth
compatibility testing.  Cyrix shipped thousands of chips with this bug
before April 1994, but has now fixed the problem.


The bug occurs when a register load instruction (such as MOV reg,mem)
is followed by an instruction that clears the floating-point status
register (FCLEX).  If the memory location being referenced is in the
CPU's internal cache, the MOV instruction works fine.  If, however, the
MOV requires an external bus cycle, executing the FCLEX instruction
aborts the cycle.  As a result, the register is not loaded properly.


The risk here is that someone may run software on the Cx486DX
that generates incorrect results where an i486DX would work fine.
The Cyrix position is that this is a minor bug and that we (Windows
Magazine and LSEL) are making too much of it.  However, LSEL has seen
the bug in their test code compiled under OS/2 and Windows NT.  The
test code performs typical engineering and scientific calculations, so
it's not contrived or artificial.  We have not found the problem in
any shrink-wrapped application.  Most MS-DOS and Microsoft Windows
insert a FWAIT instruction before any floating-point instruction, so
they generally won't exhibit the problem.


What does the Risks readership think? Are we making too much of this?
Is anyone out there using PC with a Cx486DX?