nanog mailing list archives

Re: DPDK and energy efficiency


From: Robert Bays <robert () gdk org>
Date: Tue, 23 Feb 2021 15:11:56 -0800

Hi Etienne,

Your statement that DPDK “keeps utilization at 100% regardless of packet activity” is just not correct.  You further 
pre-suppose "widespread DPDK's core operating inefficiency” without any data to backup the operating inefficacy 
assertion.  Your statements, taken at face value, lead people to believe that if a project uses DPDK it’s going to 
increase their power costs.  And that’s just not the case.  Please don’t mislead the community into believing that DPDK 
== power bad.

Everything following is informational.  Stop here if so inclined.

DPDK does not dictate CPU utilization or power consumption, the application leveraging DPDK does.  It’s the application 
that decides how to poll packets.  If an application implements DPDK using only a tight polling loop, then it will keep 
CPU cores that are running DPDK threads at 100%.  But only the most simple and/or bespoke (think trading) applications 
are implemented this way.  You don’t need tight polling all the time to get the performance gains provided by DPDK or 
similar environments.  The vast majority of applications that this audience would actually install in their networks do 
not do tight polling all the time and therefore don’t consume 100% of the CPU all the time.   An interesting, helpful 
research effort you could lead would be to survey the ecosystem to catalog those applications that do fall into the 
power hungry category and help them to change their code.  

Intel DPDK application development guidelines don’t pre-suppose tight polling all the time and offer at least two 
methods for optimizing power against throughput.  The older method is to use adaptive polling; increasing the polling 
frequency as traffic load increases.  This keeps cpu utilization low when packet load is light and increases it as 
traffic levels warrant.  The second method is to use P-states and/or C-states to put the processor into lower power 
modes when traffic loads are lighter.  We have found that adaptive polling works better across a larger pool of 
hardware types, and therefore that is what DANOS uses, amongst other things.  

Further, performance and power consumption are dictated by a multivariate set of application decisions including: 
design patterns such as single thread run to completion models vs. passing mbufs between multiple threads, buffer sizes 
and cache management algorithms, combining and/or separating tx/rx threads, binding threads to specific lcores, 
reserved cores for DPDK threads, hyperthreading, kernel schedulers, hypervisor schedulers, interface drivers, etc.  All 
of these are application specific, not DPDK generic.  Well written applications that leverage DPDK provide knobs for 
the user to tune these settings for their specific environment and use case.  None of this unique to DPDK.  Solution 
designs were cribbed from previous technologies.

The takeaway is that DPDK (and similar) doesn’t guarantee runaway power bills.  Power consumption is dictated by the 
application.  Look for well behaved applications and everything will be alright.

If you have questions, I’d be happy to discuss off line.

Thanks,
Robert.


On Feb 22, 2021, at 11:27 PM, Etienne-Victor Depasquale <edepa () ieee org> wrote:

Sorry, last line should have been:
"intended to get an impression of how widespread ***knowledge of*** DPDK's core operating inefficiency is",
not:
"intended to get an impression of how widespread DPDK's core operating inefficiency is"

On Tue, Feb 23, 2021 at 8:22 AM Etienne-Victor Depasquale <edepa () ieee org> wrote:
Beyond RX/TX CPU affinity, in DANOS you can further tune power consumption by changing the adaptive polling rate.  It 
doesn’t, per the survey, "keep utilization at 100% regardless of packet activity.” 
Robert, you seem to be conflating DPDK 
with DANOS' power control algorithms that modulate DPDK's default behaviour.

Let me know what you think; otherwise, I'm pretty confident that DPDK does:
"keep utilization at 100% regardless of packet activity.”   

Keep in mind that this is a bare-bones survey intended for busy, knowledgeable people (the ones you'd find on NANOG) -
not a detailed breakdown of modes of operation of DPDK or DANOS.
DPDK has been designed for fast I/O that's unencumbered by the trappings of general-purpose OSes, 
and that's the impression that needs to be forefront.
Power control, as well as any other dimensions of modulation, 
are detailed modes of operation that are well beyond the scope of a bare-bones 2-question survey 
intended to get an impression of how widespread DPDK's core operating inefficiency is.

Cheers,

Etienne 

On Mon, Feb 22, 2021 at 10:20 PM Robert Bays <robert () gdk org> wrote:
Beyond RX/TX CPU affinity, in DANOS you can further tune power consumption by changing the adaptive polling rate.  It 
doesn’t, per the survey, "keep utilization at 100% regardless of packet activity.”  Adaptive polling changes in DPDK 
optimize for tradeoffs between power consumption, latency/jitter and drops during throughput ramp up periods.  
Ideally your DPDK implementation has an algorithm that tries to automatically optimize based on current traffic 
patterns.

In DANOS refer to the “system default dataplane power-profile” config command tree for adaptive polling settings.  
Interface RX/TX affinity is configured on a per interface basis under the “interfaces dataplane” config command tree.

-robert


On Feb 22, 2021, at 11:46 AM, Jared Geiger <jared () compuwizz net> wrote:

DANOS lets you specify how many dataplane cores you use versus control plane cores. So if you put a 16 core host in 
to handle 2GB of traffic, you can adjust the dataplane worker cores as needed. Control plane cores don't stay at 
100% utilization. 

I use that technique plus DANOS runs on VMware (not oversubscribed) which allows me to use the hardware for other 
VMs. NICS are attached to the VM via PCI Passthrough which helps eliminate the overhead to the VMware hypervisor 
itself.

I have an 8 core VM with 4 cores set to dataplane and 4 to control plane. The 4 control plane cores are typically 
idle only processing BGP route updates, SNMP, logs, etc.

~Jared

On Sun, Feb 21, 2021 at 11:30 PM Etienne-Victor Depasquale <edepa () ieee org> wrote:
Hello folks,

I've just followed a thread regarding use of CGNAT and noted a suggestion (regarding DANOS) that includes use of 
DPDK.

As I'm interested in the breadth of adoption of DPDK, and as I'm a researcher into energy and power efficiency, I'd 
love to hear your feedback on your use of power consumption control by DPDK.

I've drawn up a bare-bones, 2-question survey at this link: 

https://www.surveymonkey.com/r/J886DPY. 

Responses have been set to anonymous.

Cheers,

Etienne

-- 
Ing. Etienne-Victor Depasquale
Assistant Lecturer
Department of Communications & Computer Engineering
Faculty of Information & Communication Technology
University of Malta
Web. https://www.um.edu.mt/profile/etiennedepasquale



-- 
Ing. Etienne-Victor Depasquale
Assistant Lecturer
Department of Communications & Computer Engineering
Faculty of Information & Communication Technology
University of Malta
Web. https://www.um.edu.mt/profile/etiennedepasquale


-- 
Ing. Etienne-Victor Depasquale
Assistant Lecturer
Department of Communications & Computer Engineering
Faculty of Information & Communication Technology
University of Malta
Web. https://www.um.edu.mt/profile/etiennedepasquale


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