Bugtraq mailing list archives
Illegal Instruction Erratum (Intel's position) (fwd)
From: jayrich () ROOM101 SYSC COM (Jay M. Richmond)
Date: Wed, 12 Nov 1997 17:05:30 -0500
This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. Send mail to mime () docserver cac washington edu for more info. --0-1845551155-879372330=:551 Content-Type: TEXT/PLAIN; charset=US-ASCII --0-1845551155-879372330=:551 Content-Type: MESSAGE/RFC822 Content-Transfer-Encoding: QUOTED-PRINTABLE Content-ID: <Pine.BSF.3.96.971112170519.551C () room101 sysc com> Content-Description: The following was posted by support () mailbox intel com (Joe Goldmeer) on comp.sys.intel. It may be of interest to you. ------------------ Start of forwarded message ---------------------- Hi, On Friday afternoon (11/7/97) we discovered a number of postings in newsgroups talking about a potential processor "bug." Working all weekend, we have confirmed a new erratum on Pentium(R) processor and the Pentium(R) processor with MMX(TM) technology and have been aggressively pursing this issue in a very accelerated manner. If a user with access rights to the operating environment and execution rights on the processor itself intentionally issues a specific illegal instruction in native machine language to the processor, the invalid instruction is not flagged and the system stops immediately. It is important to note that this erratum will only occur when someone has intentionally created this invalid instruction because they want to crash the system. The expected behavior is that the processor should return an "exception flag" to the operating system telling it that an illegal instruction was issued. This does not occur and the user system hangs; all the user needs to do is reboot to return to normal operation. There are a number of ways of dealing with errata. These include advising software authors of applicable programming techniques, implementing operating systems patches, and hardware modifications. We have been aggressive in investigating and characterizing this issue since Friday 11/7. We are following our normal(albeit accelerated) process and have begun the process of working with key industry software and hardware providers to determine the best workaround for this issue. We expect to have an update on the status of the workarounds within the next week. Intel has created a web page dedicated to this issue available to the public. It can be found at: http://support.intel.com/support/processors/pentium/ppiie/index.htm Joe Goldmeer Intel Internet Support ----------------- End of forwarded message ------------------------- Regards, Phone: (250)387-8437 Cy Schubert Fax: (250)387-5766 UNIX Support OV/VM: BCSC02(CSCHUBER) ITSD BITNET: CSCHUBER@BCSC02.BITNET Government of BC Internet: cschuber () uumail gov bc ca Cy.Schubert () gems8 gov bc ca "Quit spooling around, JES do it." --0-1845551155-879372330=:551--
Current thread:
- Illegal Instruction Erratum (Intel's position) (fwd) Jay M. Richmond (Nov 12)